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HFRD-14.0: Multirate (1Gbps to 4.25Gbps) 850nm Small Form-Factor Pluggable (SFP) Transceiver
Description:
HFRD-14.0 is a complete optical transceiver targeted for the Small Form Factor Pluggable (SFP) Multisource Agreement (MSA) market and other high-speed optical transceiver applications. The HFRD-14.0 transceiver reduces design...
Type: Reference Designs |
Maxim Integrated Products Jump directly to Maxim website for more specs on this part. |
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HFRD-16.0: 1Gbps to 4.25Gbps Active Copper SFP Cable Assembly
Description:
This reference design reduces the risk associated with experimenting with active cable assemblies by supplying complete documentation, performance evaluation and a fully assembled circuit board. Instead of fighting "red ...
Type: Reference Designs |
Maxim Integrated Products Jump directly to Maxim website for more specs on this part. |
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Interfacing the High Frequency AD8331 VGA to the AD9215 10-Bit, 65 MSPS/80 MSPS/105 MSPS ADC
Description:
Variable gain amplifiers (VGAs) serve a critical function when an analog signal with wide dynamic range is converted to digital format and the ADC resolution is insufficient to capture all useful information. For example, a 1...
Type: Reference Designs |
Analog Devices Visit ADI site for samples, data sheets, technical documents, design and simulation tools. |
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Industrial Control via the CAN Bus Demonstration Platform
Description:
A Controller-Area-Network (CAN)-Bus system enables device communication in harsh environments, found in industrial automation, military and automotive applications. As a multi-master system, each device (node) can obtain bus ...
Type: Reference Designs |
Texas Instruments Jump direct to Texas Instruments website to see app notes, order samples, and more for this part. |
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Sine Cosine Look Up Table
Description:
The Sine/Cosine Look-Up Table IP core is a drop-in module. It provides a user specified option for table value storage in Distributed/Block Memory. The core supports THETA input widths of 3 to 10 bits for distributed ROM and ...
Type: Reference Designs |
Xilinx | |
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PLB to OPB Bridge (DO-EDK)
Description:
The On-Chip Peripheral Bus (OPB) to Processor Local Bus (PLB) Bridge module translates OPB transactions into PLB transactions. It functions as a slave on the OPB side and a master on the PLB side. Access to the control regist...
Type: Reference Designs |
Xilinx | |
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JPEG, Motion Encoder (CS6100)
Description:
The JPEG, Motion Encoder (CS61000) is a highly integrated virtual component solution for leading-edge image compression and transmission applications. Its high performance is capable of sustaining data rates of over 68 mega-s...
Type: Reference Designs |
Xilinx | |
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Distributed Memory
Description:
The Distributed Memory core creates memory structures using SelectRAM. It can be used to create Read Only Memory (ROM), single-port Random Access Memory (RAM), and pseudo-dual port RAM. The core supports data widths of ...
Type: Reference Designs |
Xilinx | |
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LDO, Buck/Boost, 2 Sync Buck, Sync Boost Reference Design
Description:
LDO, Buck/Boost, 2 Sync. Buck, Sync. Boost with Vin 2.7-4.2 V LiION or 4.5-6.5 V adapter. Multiple output voltages of 1.5 V, 2.5 V, 3.3 V and 8 V. The total output power is 5.5 W.
Type: Reference Designs |
Texas Instruments Jump direct to Texas Instruments website to see app notes, order samples, and more for this part. |
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Flyback, LDO, Buck, Sync. Buck Reference Design
Description:
Flyback, LDO, Buck and Sync Buck with Vin 10 to 16 V. Multiple output voltages of -24 V, -5 V, 1.5 V, 3.3 V, 5 V, 12 V and 58 V. The total output power is 15 W.
Type: Reference Designs |
Texas Instruments Jump direct to Texas Instruments website to see app notes, order samples, and more for this part. |
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