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The SRAM

Static random access memory (SRAM) is a type of semiconductor memory where the word static indicates that it, unlike dynamic RAM (DRAM), does not need to be periodically refreshed, as SRAM uses a bistable latching circuitry to store each bit. However, SRAM is still volatile in the (conventional) sense that data is lost when powered down. (The term SDRAM, which stands for synchronous DRAM, should not be confused with it.)

Random access means that locations in the memory can be written to or read from in any order, regardless of the memory location that was last accessed.

Each bit in an SRAM is stored on four transistors that form two cross-coupled inverters. This storage cell has two stable states which are used to denote 0 and 1. Two additional access transistors serve to control the access to a storage cell during read and write operations. A typical SRAM uses six MOSFETs to store each memory bit. In addition to such 6T SRAM, other kinds of SRAM chips use 8T, 10T, or more transistors per bit -- sometimes to implement more ports in a register file.

Generally, the fewer transistors needed per cell, the smaller each cell can be. Since the cost of processing a silicon wafer is relatively fixed, using smaller cells and so packing more bits on one wafer reduces the cost per bit of memory.

Memory cells that use fewer than 6 transistors are possible -- but such 3T or 1T cells are DRAM, not SRAM (even 1T-SRAM).

Source: Wikipedia

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